Alta Releases Advanced MIL-STD-1553 Bus Controller Signal Generator Protocol Testing
October 9, 2009 | External LinkInnovative New Feature Advances 1553 Bus Controller (BC) Protocol Testing for High Reliability Control Systems
Rio Rancho, NM (Alta Wire) - Alta Data Technologies of Rio Rancho New Mexico annouced the release of a new “BC Signal Generator Test” feature that advances MIL-STD-1553 Bus Controller (BC) protocol testing. The new feature involves an advanced FPGA trigger mode that starts a flexible signal generator function to reproduce Remote Terminal (RT) responses to command messages. The user has great flexibility to create virtually any signal pattern of varied bit/sync encoding, word legth, parity and message length errors to test BC error handling conditions. “For nearly 20 years, engineers did not have a good method of testing BC designs in a similar manner as RT designs per the SAE AS4111 or AS4113 1553 test plans. It was not possible to generate these complex signal patterns with commercial off the shelf interface cards,” says Jake Haddock, Alta’s CTO. He continues, “With this new AltaCore-1553 FPGA release, which is part of our standard product and has been RT Validated by Test Systems Inc., the user can define and transmit virtually any signal pattern in response to a BC command message in a very similar fashion as with AS15531 SAE RT Validation tests. And the best part is the simplicity of the application program interface (API) to setup and generate the pattern – it takes only minutes to setup and run user defined patterns.”
Updated: 7 January 2010